RC1000PP FPGA Macro Reference

  PP1000ReadBank0(Reg,Addr);
  PP1000ReadBank1(Reg,Addr);
  PP1000ReadBank2(Reg,Addr);
  PP1000ReadBank3(Reg,Addr);

Arguments
Reg	Register to read data into. Must be 8 or 32 bits wide.
Addr	Address to read data from. Must be 19, 21 or 23 bits wide.
Return Values
Reg is set to contents of memory bank.
Execution Time
One clock cycle.
Description
These macro procedures should be used to read from the external memory banks on an RC1000-PP card. They can access any banks in parallel but the memory banks must have been granted to the FPGA before hand. To request memory banks use the `PP1000RequestMemoryBank()`macro procedure. If you define 8 bit access to memory using the `PP1000_8BIT_RAMS` preprocessor macro, Reg must be 8 bits wide and Addr must be 21 bits wide on a revision 1.0 PCB or 23 bits wide on a revision 2.0 PCB. The external RAM will then be accessed as byte wide memory. If you define 32 bit access to external memory using the `PP1000_32BIT_RAMS` preprocessor macro, Reg must be 32 bits wide and Addr must be 19 bits wide on a revision 1.0 PCB or 21 bits wide on a revision 2.0 PCB. The external RAM will then be accessed as 32 bit word wide memory. You should not attempt to read or write twice from the same bank of memory in the same clock cycle.

PP1000ReadControl(Reg);

Arguments
Reg	Register to receive the value from the control port. Must be 8 bits wide.
Return Values
Reg is set to the value from the control port.
Execution Time
Waits until data is written by host program.
Description
This macro procedure will read a byte from the control port. The control port can be written to by the `PP1000WriteControl()` function on the host. This macro procedure will wait until the host has written a value to the control port before completing. The host `PP1000WriteControl()` function will block until this macro procedure reads from the port. This macro procedure should not be called in parallel with itself.

PP1000ReadGPO();

Arguments
None
Return Values
Zero if GPO pin is low or one if GPO pin is high. Return value is one bit wide.
Execution Time
Zero clock cycles ( macro expression).
Description
This macro expression returns the value on the GPO pin. The value on this pin can be set by the host PP1000SetGPO() function.

PP1000ReleaseMemoryBank(Mask);

Arguments
Mask	Mask of banks to release. Must be 4 bits wide.
Return Values
None.
Execution Time
One clock cycle.
Description
This macro procedure will release ownership of one or more memory banks. Bit 0 (i.e. the LSB) of Mask should be set to 1 to release bank 0, bit 1 of Mask should be set to 1 to release bank 1 and so on. This macro procedure should not be called in parallel with itself or with the `PP1000RequestMemoryBank`() macro procedure.

PP1000RequestMemoryBank(Mask);

Arguments
Mask	Mask of banks request. Must be 4 bits wide.
Return Values
None.
Execution Time
Blocks until all banks are granted to the FPGA.
Description
This macro procedure will request ownership of one or more memory banks and wait until those banks are granted to the FPGA before returning. Bit 0 (i.e. the LSB) of Mask should be set to 1 to request bank 0, bit 1 of Mask should be set to 1 to request bank 1 and so on. The requested bits are ORed with the current set of requested banks. Use the `PP1000ReleaseMemoryBank()` macro procedure to release ownership of memory banks. This macro procedure should not be called in parallel with itself or with the `PP1000ReleaseMemoryBank()` macro procedure.

PP1000SetGPI(Expr);

Arguments
Expr	Zero to clear GPI pin, non-zero to set GPI pin.
Return Values
None.
Execution Time
One clock cycle.
Description
This macro procedure will set the value of the GPI pin. The value on this pin can be read by the host `PP1000ReadGPI()` function. This macro procedure should not be called in parallel with itself.

PP1000SetLEDs(Mask);

Arguments
Mask	Mask of LED states. Must be 8 bits wide.
Return Values
None.
Execution Time
One clock cycle.
Description
This macro procedure will set the state of all 8 LEDs in a single clock cycle. Bit 0 of Mask (i.e. the LSB) corresponds to LED 0, bit 1 of Mask corresponds to LED 1 and so on. When a bit is set to 1, the LED will be switched on and when set to zero the LED will be switched off. This macro procedure should not be called in parallel with itself or with the `PP1000LEDOn`() or `PP1000LEDOff`() macro procedures.

  PP1000WriteBank0(Addr,Expr);
  PP1000WriteBank1(Addr,Expr);
  PP1000WriteBank2(Addr,Expr);
  PP1000WriteBank3(Addr,Expr);

Arguments
Addr	Address to write data to. Must be 19, 21 or 23 bits wide.
Expr	Data to write to RAM. Must be 8 or 32 bits wide.
Return Values
None.
Execution Time
One clock cycle.
Description
These macro procedures should be used to write to the external memory banks on an RC1000-PP card. They can be used to access any banks in parallel but the memory banks must have been granted to the FPGA before an access is attempted. To request memory banks use the `PP1000RequestMemoryBank()` macro procedure. If 8 bits access to memory is defined with the `PP1000_8BIT_RAMS` preprocessor macro, Expr must be 8 bits wide and Addr must be 21 bits wide on a revision 1.0 PCB or 23 bits wide on a revision 2.0 PCB. The external RAM will then be accessed as byte wide memory. If 32 bits access to memory is defined with the `PP1000_32BIT_RAMS` preprocessor macro, Expr must be 32 bits wide and Addr must be 19 bits wide on a revision 1.0 PCB or 21 bits wide on a revision 2.0 PCB. The external RAM will then be accessed as 32 bit word wide memory. You should not attempt to read or write twice from the same bank of memory in the same clock cycle.

PP1000WriteStatus(Expr);

Arguments
Expr	Expression to write to the status port. Must be 8 bits wide.
Return Values
None.
Execution Time
Waits till data is read by host program.
Description
This macro procedure will write a byte to the status port. The status port can be read with the `PP1000ReadStatus()` function on the host. This macro procedure will wait until the host has read the data from the control port before completing. The host `PP1000ReadStatus()` function will block until this macro procedure writes to the port. This macro procedure should not be called in parallel with itself.

Configuration items	Macros to Define
Clock division factor	`PP1000_DIVIDE1 PP1000_DIVIDE3 PP1000_DIVIDE4`
Clock source	`PP1000_CLOCK`
External RAM width	`PP1000_8BIT_RAMS PP1000_32BIT_RAMS`

Arguments
Index	Index of LED to switch on. Should be between 0 and 7 inclusive.
Return Values
None.
Execution Time
One clock cycle.
Description
This macro procedure will turn a single LED on. This macro procedure should not be called in parallel with itself or `PP1000LEDOff`() if Index is the same or with the `PP1000SetLEDs`() macro procedure.

Arguments
Index	Index of LED to switch off. Should be between 0 and 7 inclusive.
Return Values
None.
Execution Time
One clock cycle.
Description
This macro procedure will turn a single LED off. This macro procedure should not be called in parallel with itself or `PP1000LEDOn`() if Index is the same or with the `PP1000SetLEDs`() macro procedure.

RC1000-PP: FPGA Macro Reference

Each macro description lists the arguments and widths required and values returned as well as timing details of the macros.The macros and other definitions are provided in the pp1000.h header file which must be included at the start of your Handel-C program.

Preprocessor Macros

Before including the pp1000.h header file you must define some pre-processor macros describing the configuration of the card. These macros are described in full in the Software Reference Manual and are summarised in the table below.

For example, to set the board up with a clock source of MCLK divided by 4 and with 32 bit access to the external memory banks, the following code should appear at the start of the Handel-C program.

#define PP1000_DIVIDE4 #define PP1000_CLOCK PP1000_MCLK #define PP1000_32BIT_RAMS #include “pp1000.h”

PP1000LEDOn

This macro procedure will turn a single LED on.

This macro procedure should not be called in parallel with itself or PP1000LEDOff() if Index is the same or with the PP1000SetLEDs() macro procedure.

PP1000LEDOff

This macro procedure will turn a single LED off.

This macro procedure should not be called in parallel with itself or PP1000LEDOn() if Index is the same or with the PP1000SetLEDs() macro procedure.

PP1000ReadBank#

These macro procedures should be used to read from the external memory banks on an RC1000-PP card. They can access any banks in parallel but the memory banks must have been granted to the FPGA before hand. To request memory banks use the PP1000RequestMemoryBank() macro procedure.

If you define 8 bit access to memory using the PP1000_8BIT_RAMS preprocessor macro, Reg must be 8 bits wide and Addr must be 21 bits wide on a revision 1.0 PCB or 23 bits wide on a revision 2.0 PCB. The external RAM will then be accessed as byte wide memory.

If you define 32 bit access to external memory using the PP1000_32BIT_RAMS preprocessor macro, Reg must be 32 bits wide and Addr must be 19 bits wide on a revision 1.0 PCB or 21 bits wide on a revision 2.0 PCB. The external RAM will then be accessed as 32 bit word wide memory.

You should not attempt to read or write twice from the same bank of memory in the same clock cycle.

PP1000ReadControl

This macro procedure should not be called in parallel with itself.

PP1000ReadGPO

This macro expression returns the value on the GPO pin. The value on this pin can be set by the host PP1000SetGPO() function.

PP1000ReleaseMemoryBank

This macro procedure will release ownership of one or more memory banks.

Bit 0 (i.e. the LSB) of Mask should be set to 1 to release bank 0, bit 1 of Mask should be set to 1 to release bank 1 and so on.

This macro procedure should not be called in parallel with itself or with the PP1000RequestMemoryBank() macro procedure.

PP1000RequestMemoryBank

This macro procedure will request ownership of one or more memory banks and wait until those banks are granted to the FPGA before returning.

Bit 0 (i.e. the LSB) of Mask should be set to 1 to request bank 0, bit 1 of Mask should be set to 1 to request bank 1 and so on. The requested bits are ORed with the current set of requested banks. Use the PP1000ReleaseMemoryBank() macro procedure to release ownership of memory banks.

This macro procedure should not be called in parallel with itself or with the PP1000ReleaseMemoryBank() macro procedure.

PP1000SetGPI

This macro procedure will set the value of the GPI pin. The value on this pin can be read by the host PP1000ReadGPI() function.

This macro procedure should not be called in parallel with itself.

PP1000SetLEDs

This macro procedure will set the state of all 8 LEDs in a single clock cycle. Bit 0 of Mask (i.e. the LSB) corresponds to LED 0, bit 1 of Mask corresponds to LED 1 and so on. When a bit is set to 1, the LED will be switched on and when set to zero the LED will be switched off.

This macro procedure should not be called in parallel with itself or with the PP1000LEDOn() or PP1000LEDOff() macro procedures.

PP1000WriteBank#

If 8 bits access to memory is defined with the PP1000_8BIT_RAMS preprocessor macro, Expr must be 8 bits wide and Addr must be 21 bits wide on a revision 1.0 PCB or 23 bits wide on a revision 2.0 PCB. The external RAM will then be accessed as byte wide memory.

If 32 bits access to memory is defined with the PP1000_32BIT_RAMS preprocessor macro, Expr must be 32 bits wide and Addr must be 19 bits wide on a revision 1.0 PCB or 21 bits wide on a revision 2.0 PCB. The external RAM will then be accessed as 32 bit word wide memory.

You should not attempt to read or write twice from the same bank of memory in the same clock cycle.

PP1000WriteStatus

This macro procedure should not be called in parallel with itself.

RC1000-PP:
FPGA Macro Reference

#define PP1000_DIVIDE4
#define PP1000_CLOCK PP1000_MCLK
#define PP1000_32BIT_RAMS
#include “pp1000.h”

This macro procedure should not be called in parallel with itself or `PP1000LEDOff`() if Index is the same or with the `PP1000SetLEDs`() macro procedure.

This macro procedure should not be called in parallel with itself or `PP1000LEDOn`() if Index is the same or with the `PP1000SetLEDs`() macro procedure.

These macro procedures should be used to read from the external memory banks on an RC1000-PP card. They can access any banks in parallel but the memory banks must have been granted to the FPGA before hand. To request memory banks use the `PP1000RequestMemoryBank()`macro procedure.

If you define 8 bit access to memory using the `PP1000_8BIT_RAMS` preprocessor macro, Reg must be 8 bits wide and Addr must be 21 bits wide on a revision 1.0 PCB or 23 bits wide on a revision 2.0 PCB. The external RAM will then be accessed as byte wide memory.

If you define 32 bit access to external memory using the `PP1000_32BIT_RAMS` preprocessor macro, Reg must be 32 bits wide and Addr must be 19 bits wide on a revision 1.0 PCB or 21 bits wide on a revision 2.0 PCB. The external RAM will then be accessed as 32 bit word wide memory.

This macro procedure should not be called in parallel with itself or with the `PP1000RequestMemoryBank`() macro procedure.

Bit 0 (i.e. the LSB) of Mask should be set to 1 to request bank 0, bit 1 of Mask should be set to 1 to request bank 1 and so on. The requested bits are ORed with the current set of requested banks. Use the `PP1000ReleaseMemoryBank()` macro procedure to release ownership of memory banks.

This macro procedure should not be called in parallel with itself or with the `PP1000ReleaseMemoryBank()` macro procedure.

This macro procedure will set the value of the GPI pin. The value on this pin can be read by the host `PP1000ReadGPI()` function.

This macro procedure should not be called in parallel with itself or with the `PP1000LEDOn`() or `PP1000LEDOff`() macro procedures.

If 8 bits access to memory is defined with the `PP1000_8BIT_RAMS` preprocessor macro, Expr must be 8 bits wide and Addr must be 21 bits wide on a revision 1.0 PCB or 23 bits wide on a revision 2.0 PCB. The external RAM will then be accessed as byte wide memory.

If 32 bits access to memory is defined with the `PP1000_32BIT_RAMS` preprocessor macro, Expr must be 32 bits wide and Addr must be 19 bits wide on a revision 1.0 PCB or 21 bits wide on a revision 2.0 PCB. The external RAM will then be accessed as 32 bit word wide memory.